Scalable High-Quality Graphene Transistors.

Scalable High-Quality Graphene TransistorsA self-aligned process, enabled by the unique structure of the transferred gate stacks, is then used to position precisely the source and drain electrodes with minimized access resistance or parasitic capacitance. This process has therefore enabled scalable fabrication of self-aligned graphene transistors with unprecedented performance including a record-high cutoff frequency up to 427 GHz. Our study defines a unique pathway to large-scale fabrication of high-performance graphene transistors, and holds significant potential for future application of graphene-based devices in ultra–high-frequency circuits.

New first generation high-quality, graphene transistors, just jumped from next decade into this decade, I suspect.  At least if my take on a paper published in the Proceedings of the National Academy of Sciences of the United States of America, (PNAS,) is correct. Scientists at UCLA have developed a practical way of exploiting graphene’s potential for making superfast, ultra small, energy and heat efficient transistors.

My guess is that all around the world in a whole host of different industries, but probably as usual lead by the defence and aerospace industries, this development is going to get the fast track treatment. All of those “what if we only had….” projects, are now going to get a second look.

Below, yet another giant leap for the 21st century miracle material, graphene. All too soon we’ll be saying “how did they live without it.”

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Novel, scalable method for fabricating high-quality graphene transistors
 Jul 6th, 2012
(Nanowerk News) Graphene, a one-atom-thick layer of graphitic carbon, has attracted a great deal of attention for its potential use as a transistor that could make consumer electronic devices faster and smaller. But the material's unique properties, and the shrinking scale of electronics, also make graphene difficult to fabricate on a large scale. The production of high-performance graphene using conventional fabrication techniques often leads to damage to the graphene lattice's shape and performance, resulting in problems that include parasitic capacitance and serial resistance.

Now, researchers from the California NanoSystems Institute at UCLA, the UCLA Department of Chemistry and Biochemistry, and the department of materials science and engineering at the UCLA Henry Samueli School of Engineering and Applied Science have developed a successful, scalable method for fabricating self-aligned graphene transistors with transferred gate stacks.

—- By performing the conventional lithography, deposition and etching steps on a sacrificial substrate before integrating with large-area graphene through a physical transferring process, the new approach addresses and overcomes the challenges of conventional fabrication. With a damage-free transfer process and a self-aligned device structure, this method has enabled self-aligned graphene transistors with the highest cutoff frequency to date — greater than 400 GHz.

High-frequency self-aligned graphene transistors with transferred gate stacks
Edited by Paul L. McEuen, Cornell University, Ithaca, NY, and approved June 8, 2012 (received for review April 4, 2012)

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